Gate-level simulation of ASIC in browser

by pictureon 1/8/2025, 6:38 AMwith 31 comments

by mikewaroton 1/8/2025, 7:34 AM

I'm amazed. The technical wizardry involved in stuffing this into such a small area of Silicon, then simulating it in a web browser, is awe inspiring.

At the same time I'm filled with doubt I can get my BitGrid to the same state.

by znahon 1/8/2025, 9:19 AM

Author here, and this is how running your design on real hardware feels https://x.com/zzznah/status/1876684831222067350?t=b8-zl-h6uV...

by StringyBobon 1/8/2025, 8:07 AM

See also virtual 6502 and ARM1 e.g. http://www.visual6502.org/sim/varm/armgl.html

by londons_exploreon 1/8/2025, 11:47 PM

How many gates are here?

Is it near the crossover of where the same amount of logic can implement a tiny CPU which can run a program to generate the same output?

(I guess not in this case, because it needs to output 18 million pixels per second, and a micro-CPU probably won't be doing that anytime soon)

by Aardwolfon 1/8/2025, 9:47 AM

This is amazing, I assume the sections lighting on/off are getting electrically activated, but what is this yellow orb slowly moving from left to right near the top?

by tmvphilon 1/8/2025, 7:45 PM

Completely wild to me that you are backing out the netlist from the geometry gds.

by ge96on 1/8/2025, 3:31 PM

It looks visually cool

by butlikeon 1/8/2025, 3:03 PM

Tyrell Corporation